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CYUSB3304 Super speed doesn't recognize ( impedence or something else?)

March 2, 2017, 8:09 am
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USB High-Speed Peripherals

Hi

I have a big problem with CYUSB3304 super speed signal on my board. I checked all impedences  with a software PCB design and the that's all right, but it's working only usb 2.0 and create a simple  " generic hub " on Windows 7. The revision chip is " E" without external Eeprom, and all settings into internal ROM are corrects, and i tried to change the  physical chip but doesn't work again.

Have you any information or other cases about this problem?

Is it  possible some HW problem? 

I routed the SS signal into multilayer PCB  with a correct stek up. Can the internal layer create a link problem?

 

Thanks in advance

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GPIF Does not send data to peripheral

March 4, 2017, 5:42 am
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USB High-Speed Peripherals

hi every body.

I want to send data from host to FPGA in with CY7C68013A in GPIF mode.

So I've Design a simple waveform like this :

https://ufile.io/87df21

and also I've written and firmware that with receiving vendor command 0xb2 goes to GPIF mode and set fifo write transaction for 277 kbyte.but it seems that the firmware does not trig GPIF waveform.

for testing the project first i Was sending the 0xb2 command with control center and then sending my data in endpoint2(bulk out endpoint, quad buffer) but i am unable to send more than 4 packet...

what is wrong?

here is main code:

https://ufile.io/779a6 

thanks

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Problem of FX3 Control Center transfer data out

March 6, 2017, 10:13 pm
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USB High-Speed Peripherals

Dear all,

I follow the "Designing with the EZ-USB®FX3™Slave FIFO Interface" datasheet to build my project which PC directly send the pattern data to the projector through FX3 without FPGA. And I have some questions below: ,

Q1:How to transfer picture data from PC through FX3 UART to projector device? For example [400, 400] data array with "0" or "1"

Q2:In Control Center, enter some hex to transfer data out to the consumer socket. Where can the outer device to get these data? In short, all I want to do is to use these data to D0~D15(GPIO[0]~GPIO[15]), how to do that?

Please give me some advice, thanks 
Sincerely, 

Liao

 

Attachments: 
Download 004.png
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transfer for 2Mbytes image data stream per frame continuoulsy

March 9, 2017, 10:52 pm
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USB High-Speed Peripherals

Hi, 

Our camera hardware is based on cy68013A usb2.0 controller. I am using CyAPI(1.3) to develop win10 camera software. We are using bulk transfer.

My transfer code transplanted from your bulkloop example. When I receive 1280 * 960 * 2 bytes from the hardware, the buffer in the hardware will always overflow resulting in I can't receive the frame data correctly. In this case, I'am using packetSize = 1024, packetNum = 1280 * 960 * 2 / 1024, transferQueueSize = 1 with the funcions BeginDataXfer/WaitForXfer/FinishDataXfer. However, if I increase transferQueueSize and decrease the packetNum, The data transfer will be more efficiently and in some values of the two, we will receive the data normally. Our speed is up to 35Mbytes/s.

So why do the different packetNum and transferQueueSize lead to different efficiency of receiving data? And what's the thing does BegingDataXfer/WaitForXfer/FinishDataXfer separately? The last question is where to reflect the transfer asynchronization.

Thank you.

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Help on Cy7c68013A with slave fifo

March 13, 2017, 12:35 am
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USB High-Speed Peripherals

Hi all ,

      We are using cy7c68013a with slave fifo to transfer data between FPGA and USB host . All seems

fine , we could send data by cyconsole correctly to FPGA .  But we find something strange that if FPGA

do not fetch datas in SLAVE fifo quickly cy7c68013a would fail to transfer data again , at that moment

we must reset cy7c68013a chip to make it come back to work .  EP2 is configured as Bulk-Out with 2x512-bytes

FIFOs .  Here is the steps to reoccur this phenomenon . 

       1.  Disable FPGA to fetch data from SLAVE FIFO

       2.  CyConsole sends 3  512-bytes packets to   cy7c68013a , the 3rd packet would fail

       3. Wait for some time . some seconds or some minutes .

       4. Enable FPGA to fetch data again . SLAVE fifo would be cleared .

       5. Try to send packets to cy7c68013a again . 

       6.  Repeat 1 ~ 5 , cy7c68013a would suddenly fail to transfer data .

I read register EP2CS and EP2FIFOFLGS of cy7c68013a ,​  EP2CS = 0x28  and  EP2FIFOFLGS = 0x02 .  FIFOREST could

not make  EP2CS's value changed .  EP0 still work fine at this time .   It seems EP2 had entered wrong state .

       Anyone knows what is wrong about  cy7c68013a ?  Thanks a lot !

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FX2LP won't boot from eeprom

March 20, 2017, 10:55 am
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USB High-Speed Peripherals

I successfuly write a 64KB eeprom, but after reset or reenumerate, it boots as default. Any ideas on where to look? I have replaced the eeprom already with a fresh new one. Cypress Control Panel writes to it, but it seems that at boot time, FX2LP won't recognize it.

 

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CY7C68014A FX2LP Port B and Port D

March 21, 2017, 1:02 am
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USB High-Speed Peripherals

Hi, 

I want to use this fx2lp CY7C68014A as a slave device for high speed data exchange at the rate more than 120mbps.

I want to know that at what rate the data is transferred on the Port B and port D of this IC when 48MHz crystal oscillator is provided.. I want to connect other peripherals on port B and D depending on the rate of data transfer.

Can any one help with this query..

 

Thanks,

Dhara

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Availability and support for CY3687 MoBL-USB FX2LP18 Developers Kit

March 30, 2017, 6:38 am
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USB High-Speed Peripherals

Hi,

I'm interested in evaluating the FX2LP18 USB controller in an upcoming low-power embedded design and I would like to purchase the CY3687 Developers Kit.  However, according to the Cypress Website (http://www.cypress.com/documentation/development-kitsboards/cy3687-mobl-...) this kit is out of stock and the only distributor that seems to carry this development kit (Avnet) also does not have it in stock.

Is the CY3687 Development Kit still available for purchase?  If so, what is the current lead-time for this kit and where can it be purchased?

Is the MoBL-USB FX2LP18 controller still supported and recommended for new dessigns or would the FX2LP be a better choice for a low-power embedded design since the development kits for this part (CY3684) appears to be widely available from multiple distributors and directly from Cypress?  Since this is a low-power design I would prefer the FX2LP18 since the core operates at 1.8 V vs. 3.3 V for the FX2LP.

As another possible alternative, since the new design will only be connecting to a USB 2.0 host, is it possible that the FX3 would consume less power than the FX2LP / FX2LP18 when connected to a USB 2.0 host?

Any feedback would be appreciated.  I look forward to your response.

- Brad

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CY7C68013A & LINUX driver (raspberry pi)

April 6, 2017, 12:38 am
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USB High-Speed Peripherals

I need driver for Linux (Raspberry PI) for CY7C68013A.

Is this driver available and can install in raspberry(rasbain)?

EZ-USB FX3 SDK v1.3.3 for Linux  maybe can slove it,but i have no idea to install it in  raspberry pi.

But how do i getting start it. Entire tar.gz(422MB) put into raspberry pi? 

http://www.cypress.com/forum/usb-high-speed-peripherals/cy7c68013a-driver-linuxusb-high-speed-peripherals/cy7c68013a-driver-linux

any one can give me some suggestion or user guide ?

Thanks.

 

In pi i enter lsusb can see ID 52cb:52cb  . Is it OK? 

pi@raspberrypi:~ $ lsusb
Bus 001 Device 011: ID 046d:c52b Logitech, Inc. Unifying Receiver
Bus 001 Device 010: ID 04d9:1702 Holtek Semiconductor, Inc. 
Bus 001 Device 009: ID 1a40:0101 Terminus Technology Inc. 4-Port HUB
Bus 001 Device 012: ID 52cb:52cb  
Bus 001 Device 003: ID 0424:ec00 Standard Microsystems Corp. SMSC9512/9514 Fast Ethernet Adapter
Bus 001 Device 002: ID 0424:9514 Standard Microsystems Corp. 
Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub

 

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Problems while using CY7C68013A with innerclk

April 11, 2017, 6:49 pm
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USB High-Speed Peripherals

Hi!

I'm new with CYUSB and met some problems. I have made my own PCB with Altera FPGA and CY7C68013A. And I have made a mistake that I set the IFCLK pin in FPGA side as an input only pin so I have to use 68013A's internal clk.Is my understanding right that I can use it that way in synchronous slave FIFO?

I have test my code, and found when I assert SLOE and SLRD, FD[7:0] can set the first data correctly but it seems that the FIFOptr never change, data did not change and empty flag remain high.then I try it in writing, than I found the same problem ,Ican see the FPGA program function well that the FD[7:0] repeatly raising from 0 to 256, SLWR low and IFCLK in a sin curve but empty flag still low. 

I also tried Asynchronous mode and met the same problem. 

I have upload my code. It wouldn't be more thanksful from me that anyone could help me to solve that problems. 

Attachments: 
Download slave.txt
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Usb mass storage product

April 13, 2017, 5:33 am
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USB High-Speed Peripherals

Dear i have a project to build a kind of usb mass storage product the design if finished and done by an engineer, i am a computer scientist so i don't know anything about.

I already order some proto pcb of my usb key, the design use this controller : 

EZ-USB NX2LP-Flex  ( from mouser : CY7C68023-56LTXC) and eight of  S34ML04G1

So if i correctly understood the doc of the nand is programmed the controller act of mass storage device if not it act as "manufactur mode"

So what must be done to have a mass storage device working ?

Thanks in advance

Marc

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usb data transfer

April 13, 2017, 2:35 pm
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USB High-Speed Peripherals

Hello

i am new at cypress. i used avr, nxp, stm32 but i havent used cypress devices before. when i saw psoc arm and psoc creator i am amazed and i liked it.

Now i see lots of usb devices on cypress. 

i want to send data from psoc arm  to usb 2.0 / and from computer i want to send some data to psoc 5lp. there are lots of usb modules but i cant select them clearly. For example i measured adc and i want to send it to computer. but i dont want to use usb/uart converter. i need fast communication. usb2.0 12mbit/sec or 480mbit/sec.

Can you help me which one must i use?

thanks in advance

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build fail on keil uVision2

April 18, 2017, 7:54 pm
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USB High-Speed Peripherals

Hi,

I have a question When is try to build the firmwarer for FX2LP using keil uVision2.

The build result is shown attached pic.

I can’t find the exit-code =4

also, I don’t know what is means

could you give me solve or advice about this problem.

My dev system base on windows10, and I try also windows7 dev system too. But it’s result same.

 

 

Attachments: 
Download snap.PNG
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Support forum for CYW20704 / BCM20704

April 19, 2017, 11:05 am
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USB High-Speed Peripherals

I'm looking for a support forum for the CYW20704 / BCM20704. I tried the WICED community but they said that wasn't the right place. Is this USB forum the right community?

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getting all packets when using CyUSB.net

April 23, 2017, 2:48 pm
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USB High-Speed Peripherals

Hi-

  I'm new to using the Cypress chips (FX2), and I'm looking for some pointers on getting started with CyUSB.net ...

  I have the FX2LP set up in FIFO mode, bulk endpoint (IN) on EP6, which is connected to an FPGA that generates packets to send.  This is based on the AN61345 slave FIFO app note, but modified so it puts a data packet in the FIFO every 0.5 ms.  I can read this data using the Streamer C# application (AN4053), or the Control Center.  I can make a simple C# program of my own that reads packets, based on these examples.

   To this point, I've usually used RS232 (or CDC device class), for which the process typically is:

1. open a handle to the port (CreateHandle)

2. this causes the operating system to buffer data until read by the application; also, it grants exclusive access

3. read data

4. close the port when done

5. if the operating system's buffer overflowed, an error flag is set that the program can see

   Using CyUSB.net...

1. Is there an equivalent of "opening the endpoint"?  I don't see an equivalent way to signal to CyUSB, "hey, direct all incoming packets to my application!"

2. How do I guarantee that I get all packets in order, with none lost?

3. How do I guarantee exclusive access for my program?

For example, I can run 2 instances of the Streamer example side-by-side, and neither knows that it is losing half the data to the other program!

 

Thanks!

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Signing Cypress USB driver with custom VID/PID for Windows 7/10 64-bit

April 25, 2017, 2:14 pm
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USB High-Speed Peripherals

Hello,

We're using Cypress USB driver with our custom VID/PID.

Because of our security requirements we're allowed install only signed Windows drivers - could you help us to figure out how we can sign Cypress USB driver with our custom VID/PID for Win x64 7/10?

Thank you in advance.

 

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Slave FIFO for stream capture

May 10, 2017, 6:17 am
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USB High-Speed Peripherals

Hi-

I'm using Cypress’s EZ-USB® FX3™.

FX3 set up in slave FIFO mode, bulk endpoint (OUT) for stream capture.

DATA FLOW--

FPGA -> FX3 -> HostPC

 

Then, I have some problem. 

​1. When Host PC start transfer data.(triggering)

2. In spite of FPGA does not send data to FX3, but HostPC capture data. 

It's data only 'EF EF EF EF ....'. 

What's worng with me? and What should i do?

 

Thanks!

 

 

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FX2LP Performance for UVC / UAC

May 10, 2017, 2:59 pm
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USB High-Speed Peripherals

I have an application that requires 640x480 video at 30 FPS (such as from an OV 5640), as well as audio in and out to be transmitted over USB 2.0 using UVC and UAC.  Is the FX2LP capable of doing this?  If so, will I need to employ any sort of video and/or audio compression?  If the FX2LP can not handle this, is there an alternative device that can?

Thanks...

Brian

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OV7251 sensor with CX3 RDK board Black screen

May 13, 2017, 1:07 am
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USB High-Speed Peripherals

I have CX3RDK kit with OV7251 sensor. OV7251 is VGA and Black and white ( RAW10 bit)

I added ov7251 init code for I2C write. I2C write is looks good, because read back value almost same.

But eCAM viewer has [ Resolution : 640x480 ] but, FrameRate: 0.0 fps... and Screen is Black.

And windows can find USB video device. 

When I cover my hand up OV7251. Mipi data looks changed. so I think sensor is working.

And My project file come from cycx3_uvc_ov5640 sample file. 

 

when i checked trouble shooting doc.... "check...  glDMATxCount  is zero (0) "

but when I change ov7251 sensor MIPI_CTRL ( Clock Lane gate enable = Gate clock lane with no package to transmit )

I can see CX3_DMA_RESET_EVENT repeatly. 

Could any one give me an answer what problem causes the machine display black view?

my system; USB2.0 ( not a USB3.0)

 

 

 

 

 

 

 

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Questions about AN61345 - EZ-USB FX2LP™ Slave FIFO Interface using FPGA

May 16, 2017, 6:02 pm
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USB High-Speed Peripherals

Dear All,

    I refer to the design("AN61345 - Slave FIFO Interface using fpga"), and have been able to get the data, but this is not I want, the packet is too large; I hope to get a packet just 20 bytes, after to send 20 bytes data the fpga will output(PA6) a end packet signal to 68013, but I have modified the 68013 code, always can't succeed, so hope to get your help, thank you!

GS Xie

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